RECENT ADVANCES IN silicon photonic technologies
offer the potential of closely integrated optical
communication and VLSI computation
Scaling: Background
(page 2)
Figure 1 raises a natural question: how do we maintain this performance curve?
Thus, gate delay and gates per clock, whose product
gives clock frequency, appear to scale either flatly
or minimally: less than 40% per generation, or 13%
per year.
However, continued scaling of Moore’s law
appears to be in jeopardy: partly because dimensions
are rapidly approaching atomic size, and atoms do
not scale, but mostly because global economic realities
will increasingly limit financial investment into the semiconductor market.
Multichip packages using optics
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